Csdrhrt

On many MCUs, pin-states default to tri-stated (a.k.a. analog inputs) when the MCU resets so as to not affect the circuits they are connected to until software configures the pins. The tri-stated pins also allow the HW designer to choose the pull state of each pin on a case-by-case basis in function of the underlying circuitry.

However, there are some MCUs (and SoCs) that default their pins to instead activate an internal pull-up/down. For example, the LPC845 defaults all pins to pull-ups coming out of reset.

Is there a reason defaulting pins to pull-up/down is preferable to tri-stated (other than the possible incremental power savings when coming out of a reset, or the marginal BOM cost savings)?

If anything, I rarely find that pins should be pulled-up coming out of reset (I typically need to pull them down, if at all).

Because it's good practice to never leave logic pins purely floating.
Brief TI Overview
Detailed TI overview
Amusing dramatized war story of a real-world example

Other answers have given general reasons why a chip maker might make the choice to enable pull-ups by default. However, in the specific case of LPC845, there is an additional reason: it has specialized FAst Initialization Memory (FAIM) that can be used to set the state immediately after reset:

The FAIM contents provide a user-programmable initial configuration for aspects of the
microcontroller, which take effect immediately after reset, before code begins to run. For
instance, the standard I/O pads normally come out of reset with the internal pull-ups
enabled. In some systems this may cause excess current to flow, until software can
reconfigure the pads. However, by programming the FAIM appropriately, every pad's reset
configuration can be customized.

(LPC84x user manual section 4.2)

Thus they've chosen the safe (from power usage and EMI point of view) default, while allowing more advanced users to customize the setting.

Back in the days there were Intel 8051 microcontrollers that only had open drain I/O pins, so most of the time you needed external pull-ups anyway to do useful things like connecting to pushbuttons or controlling CMOS inputs of other chips. This is most likely to have easy redesign of such boards with a modern microcontroller, or people from that era that are accustomed to designing with pulled-up open-collector I/Os. Back in the day, you mostly needed pull-ups if anything, and rarely pull-downs.

Leaving GPIO pins as tri-stated inputs have many undesirable effects:

1. As manufacturing process has certain variance and a lot of other circuitry is connected to GPIO (as output buffer and ESD protection), direction of resulting parasitic leakage is unpredictable, so the state can take either logic high or low;




2. Again, due to process variation and temperature dependence, the pin leakage can be very small, resulting in either very slow change of logic state after, say, several minutes, which might be a challenge to accommodate in code, or it can drift in unpredictable direction.




3. Leaving pins floating might lead to establishing some middle potential, where the pin input buffer may act as linear amplifier with substantial gain, causing either self-oscillations (due to parasitic positive feedback across power rails), or be susceptible to external electromagnetic interference. Oscillations can be somewhere internally, and lead to out-of range power consumption.

4... must forget something else... power-on transients?

From a systems point of view, having the pins start in a defined state is a benefit. For example, a motor might be attached that shouldn't be activated without command. Peripherals usually expect their interfaces to be in a certain state, and starting in high-Z may not provide the required state. As the internal pull ups/downs in a typical microcontroller are relatively weak, they may be overridden by a stronger external pull up/down where required. As an additional note, it is nice to see in the datasheet what the expected behaviour of the pins is, this is sometimes not included..!